Electronics packaging development is greatly dependent on the magnitude of interconnect and on-chip stress that ultimately limits the reliability of electronic components. Thermomechanical strains occur because of the coefficient of thermal expansion mismatch from different conjoined materials being assembled to manufacture a device. To curb the effect of thermal expansion mismatch, studies have been done in integrating compliant structures between dies, solder balls, and substrates. Initial studies have enabled the design and manufacturing of these structures using a photolithography approach which involves an increased number of fabrication steps depending on the complexity of the structures. This current study involves the fabrication of these structures using a different approach, utilizing additive manufacturing that reduces the number of fabrication steps required to obtain compliant geometries, while also providing a platform for unique compliant structures. This paper discusses the method of fabrication and analyzes the properties and effects of these interconnect structures on a die. Structural finite element thermal cycling simulations between −40 to 125°C show about a 115% increase in the solder joint fatigue life. Additionally, fabricated test structures created directly on a PCB were experimentally characterized for compliance using a micro-indenter tester, showing a mechanical compliance range of 265.95 to 656.78 μ/N for selected design parameters to be integrated into a test vehicle.

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