Phase Change Material Behavior in Finite Thickness Slabs Under a Step Response Heat

Phase change materials (PCMs) have the capability of providing transient thermal buffering by absorbing/discharging thermal energy during melting/freezing. As high power components, including power electronics modules, laser diodes, and other devices decrease in size and increase in power, transient temperature spikes become a greater threat to module lifespan [1,2]. PCMs have shown to be promising candidates for reducing transient temperature spikes in power electronics packaging under transient thermal loads, due to their large effective thermal storage capability, derived from the latent heat of fusion, in a small and compact volume [3–5]. Generally speaking, two principle configurations exist for integrating PCMs into an electronics package (Fig. 1): (1) locating PCMs in the primary path of heat rejection (i.e., thermally in series between the heat source and heat sink), or (2) locating PCMs in a secondary position, creating a secondary thermal reservoir which is not in the primary path of heat rejection (i.e., thermally in parallel). Placing PCMs in a secondary position could include integrating PCMs in a potting compound that surrounds a device, or using a thermal ground plane to move spread heat laterally and into a volume of PCM [6–8]. PCMs in secondary positions utilize volume which was not previously utilized as a part of the thermal management system but have the potential downside that the PCM is not as closely integrated, and therefore not as responsive, as if it is in the more direct thermal path to the heat source. Placing PCMs directly in the primary path of heat rejection could include integrating PCMs into an electronics package or integrated them within a heat sink [4,5,9,10]. While this configuration generally reduces the thermal resistance between the heat source and the PCM volume, it does so at the cost of increasing the resistance between the heat source and heat sink, thereby increasing the temperature at the heat source in the steady-state condition. Thus, while integrating PCMs in the primary path of heat rejection offers intriguing possibilities, the general tradeoffs associated with this configuration have not been fully explored.

Electronic devices are subject to both transient and steady-state temperature rises, based on the device operation mode (pulsed or steady). Mitigating these temperature rises can introduce competing thermal requirements for a system. For example, the transient temperature rise may be mitigated by increasing the total thermal capacitance of the system, either by increasing sensible heat storage (by increasing the package mass) or by introducing latent heat storage (introducing PCMs) [2]. However, introducing thermal capacitance can increase the overall thermal resistance of the system if the additional package mass or PCM is in the primary path of heat rejection, which in turn increases the steady-state temperature rise. Thus, in systems that operate under mixed pulsed and steady modes, there likely exist tradeoffs between the transient and the steady-state temperature rise. It is currently unclear how to assess such tradeoffs, particularly for cases that include PCMs.

In the case of PCMs in the primary path of heat rejection, it is clear that effective thermal conductivity is a critical thermophysical property. In the steady-state case, higher thermal conductivity tends to decrease the temperature rise due to Fourier law effects. In the transient case, higher thermal conductivity (as well as higher volumetric latent heat of fusion) tends to increase the rate of heat transfer into a PCM volume, also resulting in a decrease in the junction temperature. Efforts to increase thermal conductivity in PCMs generally consist of creating composites of PCMs and thermally conductive materials such as carbon nanotube [11], pin or finned heatsinks [12–14], inverse opal structures [15], and expanded graphite [12]. Alternatively, metallic PCMs have larger intrinsic thermal conductivity and are not subject to some of the issues associated with other thermal enhancement approaches (separation, manufacturing issues, etc.) [16–18].

Krishnan and Garimella investigated introducing a slab of copper or PCM between the heat source (electronic package) and the heat sink, simulated by a convectively cooled boundary condition [9]. This paper established that, under certain circumstances, PCMs with high thermal conductivities (metallic alloys or copper foam/wax composites) can suppress junction temperature compared to copper heat sinks in the primary conduction path [9]. In addition, approximate expressions were derived to estimate the volume of PCM needed and the relative magnitude of performance improvement versus copper or other PCMs. However, this study (1) focused on a very limited range of low heat fluxes (3–6 W cm⁻²) and heat transfer coefficients on the cooled side of a slab (12 W m⁻²° C), which are not representative of many different conditions of interest in high power density systems, (2) does not directly address the relative tradeoffs between temperature rise in the steady-state and the transient condition (including an assessment of the Pareto conditions of optimality of these two metrics), and (3) considers only a single identical thickness slab, whereas it is clear that the optimal thickness for a PCM slab will vary greatly from that of a copper slab which stores heat through sensible heating. Thus, in general, the relative tradeoffs introduced by placing a PCM volume directly in the path between the heat source and the ultimate heat sink remain unresolved.

Here, the feasibility of incorporating a metallic PCM (in this case, gallium, Ga), into the primary conduction path of a power electronics package under transient loads is examined and is compared against a reference case where he is stored via sensible heating in copper (Cu). Gallium is selected here as a representative metallic PCM, although a family of low melting point metals and alloys exists that have melting temperatures that could be more appropriate for a specific operational temperature regime. The response of a PCM under a step input transient load in comparison to a conductor in the primary path of thermal conduction with an initial steady-state load is determined. It is shown that PCMs can provide superior temperature suppression for transient thermal loads in comparison to traditional conduction technologies under steady-state load initial conditions. The effects of altering backside convection, initial and ambient temperatures, and PCM thickness on comparative temperature suppression are discussed. This study demonstrates that PCMs in the primary path of conduction can be a viable thermal management solution and introduces design trends useful for optimizing PCM use.

where the j subscript indicates a particular PCM element, $Φ$ is the melted phase fraction in that element, $Tm$ is the melting temperature of the element, and H is the enthalpy of fusion of the PCM element. Once the melted phase fraction reaches 1, the melting reaction is complete, and additional heating results in sensible heating of a volume. Thus, all of the melting materials in this study melt at a single well-defined temperature.

A variable grid size was used to capture the relevant physics within the materials with minimum computational complexity. Pseudo-one-dimensional stacks (with no X and Y spatial discretization, and adiabatic vertical boundary conditions) are generated within Parapower. All element dimensions given correspond to the Z direction. The silicon carbide had an element size of 0.05 mm. The test layer had two different element sizes: one near the silicon carbide/test layer interface to capture more early melting processes that are more sensitive to element size and a second coarser element size to describe the remainder of the test layer. The finer test layer element size is used for the first 1/10th of the thickness of the test layer next to the silicon carbide interface and subdivides this space into ten elements. The remainder of the test layer is subdivided into nine elements. For the thickest PCM test layer of 10 mm, this resulted in elements too large to adequately capture the melting physics. The finer grid was changed to compose the first 3/10th of the test layer with an element size of 0.025 mm for the 10 mm thickness case to address this. Interfacial thermal resistance is not included in this model for clarity, as it has a relatively minimal impact on the results. This simplification is warranted, as the interfacial thermal resistance associated with a standard thermal interface material (e.g., 0.1 mm tin-silver-copper solder alloy with thermal conductivity of approximately 70 W m⁻¹ °C⁻¹) between the SiC substrate and the test layer is comparable to the temperature drop across the SiC substrate itself, which will be shown to be relatively negligible (Fig. 4). Furthermore, an interfacial thermal resistance between the test layer and the convectively cooled boundary layer (i.e., the heat sink) could be lumped into the convection coefficient, and we consider a broad range of convection coefficients in this study (Sec. 4.1). Likewise, convection within melted PCM volumes is considered negligible as both the small timescales of interest and small thicknesses reduce the impact of convection [9].

The geometry of this study consists of a bilayer slab, heated on one side by a constant heat flux for a finite period of time, and subject to a convective boundary condition on the opposing side (Fig. 2). The slab is composed of a 0.5 mm thick silicon carbide slab, representing a power electronics chip, directly in contact with a slab referred to as the “test layer,” composed of either copper or a PCM material. The test layer has a thickness of L (from 0.1 to 10 mm). The top surface (y = L + 0.5 mm) is cooled by convection, where the effective convection coefficient, h_∞, varies from 10¹ to 10⁴ W·m⁻² °C^–1 (representative of the effective convection coefficient associated with liquid water cold sinks), and the temperature of the coolant fluid, T_∞, varies from −70.2 °C to 29.8 °C, corresponding to $Tm$ to $Tm$ –100 °C, where $Tm$ = 29.8 °C. All other boundary conditions are adiabatic. All temperature measurements are taken at the heated base surface, which represents the hottest location within the simulation. The thermophysical properties for the phases used in this study can be found in Table 1. Material properties are not strongly temperature-dependent over the temperature range concerned. Therefore the temperature dependence of the material properties is neglected.

where $LSiC$ and $Ltest$ are the thicknesses and $kSiC$ and $ktest$ are the thermal conductivities of the silicon carbide chip and test layers, respectively. Under the conditions of this paper, all simulations with the exception of PCM cases with convections coefficients $h∞$ ≥ 1000 W m⁻² °C⁻¹ and thicknesses at or greater than 0.001 m have Bi < 0.1.

Introducing additional thermal capacitance between a heat source and a heat sink involves a tradeoff between the transient and steady-state response. In order to investigate these relative tradeoffs between simple conductors and PCMs, a parametric sweep of test layer thickness is performed for both PCM and Cu layers. This approach allows us to evaluate Pareto optimal dominance at any point. As the test layer thickness increases, the steady-state temperature rise increases due to higher total thermal resistance, while transient temperature rise decreases, due to the higher total thermal capacitance (Fig. 3). In these simulations, the system starts with a uniform initial temperature equal to the ambient temperature. The two cases are exposed to an initial heat flux at the heated surface, $q1′′$ = 10 W cm⁻², and allowed to equilibrate. The heat flux is then increased to a higher value, designated $q2′′$ = 100–500 W·cm⁻² at $t′$ = 0 s. Convection coefficients range from $h∞$ = 5000–25,000 W m⁻²° C⁻¹. The complete range of conditions evaluated is illustrated in Table 2. The system is simulated for up to 1 s with time steps of 0.25 ms, which has previously demonstrated excellent convergence for phase change problems [23]. The test layer thicknesses evaluated in these simulations were chosen to reach a target steady-state temperature $ΔTsteady$ = $T0−T∞$⁠, $t′=$ 0 s, and ranged from 0.116 mm to 7.739 mm for the conductor, and from 0.01 mm to 0.913 mm for the PCM. The ambient temperature is chosen such that the SiC-test layer interface is less than 0.2 °C below the melting temperature of the PCM after equilibrating. This method allowed us to (1) operate in a regime where $T0$ is near $Tm$⁠, but the system is initially in the solid-state (an assumption which is relaxed in Sec. 4.2), and (2) decouple the initial temperature from the heat transfer coefficient, $h∞$⁠, which is treated as an independent variable in this study (Table 2). To account for this, both $ΔTtrans$ and $ΔTtrans$ are reported relative to the ambient temperature, $T∞$⁠. The PCM test layer begins melting immediately after exposure to $q2″$ and the transient temperature rise $ΔTtrans$ = $T0−T∞$⁠, $t′>$ 0 s at the heated surface is recorded at various times. The transient temperature rise at various times and steady-state temperatures are compared. An introductory figure detailing a single selected time is shown in Fig. 3.

Thus, $ΔTsteady$ increases linearly with the thickness of the test layer, and at different rates in the Ga and Cu cases (Fig. 3). Under the conditions considered, it can be seen that, in the steady-state case, the temperature drop across the convectively cooled boundary is the dominant term. In contrast, $ΔTtrans$ represents the excursion from steady-state that occurs during short-lived high power pulses.

For thicknesses that result in an equivalent steady-state temperature rise, the PCM case remains cooler during the transient heat pulse for thicknesses greater than the crossover (points c, d; Fig. 3), while the conductor case remains cooler for thicknesses less than the crossover point. As the steady-state temperature rise is directly correlated to the thermal resistance between the heat source and the heat sink, it is also linearly related to the thickness of both the PCM and conductor cases. The total heat capacitance in the conductor case increases by increasing steady-state temperature rise and results in decreasing transient temperature rise. As the steady-state temperature rise of the PCM case increases, the total potential latent heat stored increases and at point e, the PCM has just fully melted at this time. At steady-state temperatures lower than point e (Fig. 3), the PCM has fully melted and the transient temperature rise increases at a more rapid pace than the conductor case due to the lower specific heat derived thermal capacitance of the PCM.

The internal temperature distribution at various times during a transient heat pulse is shown in Fig. 4. Cases horizontal to each other, e.g., (a) and (b), have the same total thermal resistance (using solid PCM material properties) and have the same steady-state temperature rise. At many times less than 0.1 s (Fig. 4), the PCM cases have not fully melted and the temperature distribution within the PCM rapidly drops to the melting temperature. At ∼0.1 s (the time shown in Fig. 3), although the PCM has fully melted in all cases, the PCM in cases (c) and (e) still provide for better transient temperature rise suppression than the copper cases d and f. Although brief, this is due to the PCM cases having superior temperature suppression up until this point and the rapidly rising temperature still catching up to the copper test layer cases. This shows that PCM-based transient temperature suppression can extend briefly beyond the time where the PCM fully melts. The copper test layer cases (b), (d), and (f) demonstrate the largely uniform temperature distribution within the entire structure. The large space taken up by the copper layer is necessary as energy is stored there as sensible heat, but since the thermal conductivity and diffusivity are large, there are only small temperature drops across the length of the test layer. This contrasts with the PCM case as energy is stored in a more energy-dense form as latent heat but with much lower thermal conductivities which results in much smaller layers, but with a steeper temperature drop. The difference in thickness between similarly performing PCM and copper cases may be an important design decision for space limited applications.

Figure 5 shows the comparative transient temperature rise above the ambient temperature at different levels of steady-state temperature rise for PCM and conductor test layer cases. At times of 0.1 s and less, there exist conditions under which a pure PCM can achieve a greater degree of transient temperature suppression performance at the same level of steady-state temperature suppression performance. Figures 6 and 7 perform this same comparison, but additionally compare selected values of transient heat flux and convection coefficient, respectively. The benefits of the PCM diminish as transient heat flux increases and disappears altogether at $q2,=$ 500 W cm⁻². The convection coefficient has little effect on the comparative performance between the PCM and conductor cases, but the overall magnitude of the temperature rise differs between cases with different convection coefficients.

The factors in relative transient thermal buffering between PCMs and conductors are investigated in order to develop design guidelines for incorporating PCMs for in-path pulsed thermal loads. The variables investigated are the thickness of the test layer L, the convection coefficient on the cooled surface of the test layer $h∞$⁠, and the initial and ambient temperature of the system measured as the degree of undercooling below the melting point of the PCM, $Tdiff$⁠. The conditions that are evaluated in Sec. 4.2 are summarized in Table 3. The initial and ambient temperature are always equal to one another. The PCM is initially entirely solid. The system begins at a uniform initial temperature and is exposed to a heat flux of 100 W cm⁻² at time t = 0 s and is simulated for 2.5 s with a time-step of 0.25 ms. The test layer is composed of either gallium or copper.

For the simulations where L is the variable, $h∞$ = 10,000 W·m⁻²· °C⁻¹ and a $Tdiff$ = 0 °C are used, while L takes values of either 0.1 mm, 1 mm, or 10 mm. For the simulations where $h∞$ is the variable, $Tdiff$ = 0 °C and L = 1 mm, while $h∞$ varies from 10 to 10,000 W m⁻² °C⁻¹ by orders of magnitude. For the simulations that determined the trends in changing the initial and ambient temperatures, $h∞$ = 10,000 W m⁻² °C⁻¹ and L = 0.1 mm, while $Tdiff$ takes values of either 0, 25, 50, or 100 °C. These conditions are summarized in Table 3.

As the thickness of the test layers increases the maximum comparative performance of the PCM to the conductor first increases and then decreases (Fig. 8). Additionally, the time until the PCM is fully melted increases as well, in accordance with Eq. (8). This may be seen by the sharp transitions in the temperature versus time behavior of the PCM cases. The time for fully melting for $L=$ 1 mm is displayed as an example by the blue dots. Finally, the rate at which the PCM case begins to outperform the conductor, shown as the slope of temperature difference, decreases as the thickness increases.

The decrease in the rate of temperature rise in the copper case with increasing thickness can be attributed to an increase in the thermal capacitance of the system. This can be seen from the increase in $τ$ from Eq. (5) and the resulting decrease in temperature at a given time from Eq. (6). For the cases here, the temperature rise in the PCM cases is unaffected by thickness, except for, and until, the PCM fully melts. Therefore, the cause of the larger slope for the comparative temperature suppression in the 0.1 mm and 1 mm cases is due to the difference in the time constant of the conductor case. The time that temperature suppression occurs over is directly related to the thickness of the PCM. As the PCM increases in thickness, the amount of thermal energy it can absorb before melting increases, which in turn increases the time of the thermal suppression. For the case of a 10 mm copper test layer compared to PCM, the thermal capacitance of the copper is large enough to suppress the temperature rise at the heated surface to a significant degree. In this case, the larger temperature gradient that develops in the PCM layer due to its lower thermal conductivity is now the limiting factor in the performance of the temperature suppression of the system.

Greater degrees of undercooling of the PCM increase the time at which the temperature suppression effects of the PCM begin (Fig. 9). This additionally affects the time at which the temperature suppression from the PCM ends in most cases (as given in Eqs. (7) and (8)). For the majority of cases, the duration of the temperature suppression remains relatively unchanged. The degree of undercooling has an effect on the amount of time that passes before the PCM reaches the melting temperature, and the relative difference between the rate of temperature rise in the PCM and copper cases before melting determines the extent of the detriment of the inactive PCM. The degree of comparative temperature suppression that the PCM grants is dependent upon the rate of increase in the temperature of the copper case during melting in the PCM. In cases of very large undercooling such as $Tdiff$ = 100 °C, the PCM may never reach the melting temperature, and the benefits of the PCM never materialize.

In Fig. 10, results are shown for selected cases where the convection coefficient is the only varying factor. As the convection coefficient changes, the copper case is affected at all times, but convection effects are only seen in the PCM case after melting. In addition, the degree of temperature suppression granted by the use of the PCM is decreased with increasing convection coefficient.

For cases where the ambient and initial temperatures are equal to the melting temperature of the PCM, there are no convection effects on the PCM case before melting finishes. As such, convection only plays a role in the copper case before melting. The change in the effectiveness of the comparative temperature suppression with variable convection can be contributed wholly to the change in the response of the copper case with convection. As convection increases, $τ$ and $ΔTsteady$ decrease, resulting in a decreased improvement in performance when compared to the PCM case. In addition, after melting has occurred, convection effects have a stronger effect on the PCM case than the copper case due to the greater temperature differences across the convection interface, ultimately due to the lower thermal conductivity of the PCM. As a result, as convection increases, the detriment of inactive melted PCM is reduced compared to the copper case.

Under conditions where the initial temperature and ambient temperature are not equal to the melting temperature of the PCM, a change in convection can have further effects such as extending melting time and can have an impact on temperature rise in the PCM case before melting has occurred. The impact of higher convection coefficients in such cases can mean the difference between a PCM being beneficial to a system or being completely a detriment.

There are design decisions to be made in addressing the degree of thickness of a conductive layer in transient problems. As the thickness increases, the steady-state temperature rise increases. However, the thermal capacitance increases with increasing thickness as well, which reduces the temperature rise at a given time (Fig. 3). In heat sinks that are built to handle high steady-state load condition with lower transient loads, this tradeoff is moot as the steady-state temperature is always greater than the temperature rise of the transient response. However, systems built to operate in a transient regime need to consider reducing transient temperature rise and the steady-state temperature rise that may be encountered during a system failure or overload.

Employing a conductive finite volume model, Parapower, we investigate the tradeoffs associated with increasing the effective thermal capacitance of a high power electronics package by introducing a layer of gallium, a low melting point metal, or a layer of copper between a planar heat source and a convective boundary condition heatsink. By introducing parametric plots illustrating the impact of layer thickness on $ΔTtrans$ and $ΔTsteady$⁠, we demonstrate that side-by-side comparisons of latent (Ga) and sensible (Cu) heat storage layers must consider different layer thicknesses to account for the different thermal storage mechanisms. For equivalent $ΔTsteady$⁠, the thickness of the Cu layer is approximately an order of magnitude larger. For short periods of time, conditions exist in which a PCM outperforms a traditional heat sink for transient thermal buffering at an equivalent steady-state temperature rise.

The benefit of whether a pure PCM will be beneficial in the primary direction of heat transfer depends on a number of criteria. Low convection coefficients result in greater temperature rise in the copper case, resulting in greater net benefits from the temperature suppression from PCM. Greater degrees of undercooling below the melting point of the PCM results in less efficient use of the temperature suppressing effects of the PCM, and delayed benefits from the PCM. Low existing thermal capacitance in the system results in large transient temperature rises, allowing greater PCM temperature suppression benefits. For an optimal electronics package design, the thickness of the PCM should be tailored to absorb a designated thermal pulse and no greater to avoid the existence of untransformed PCM which increases the thermal resistance between the heat source and the heat sink.

The authors would like to thank the Office of Naval Research, the U.S. Army Research Lab, the Office of the Secretary of Defense, and Bruce Geil for their support in this work. Deckard acknowledges the support of this work from Army cooperative research agreement W911NF1920264.

• Office of Naval Research (Grant No. N0001418C2001; Funder ID: 10.13039/100000006).

• U.S. Army Research Laboratory (Grant No. W911NF1920264; Funder ID: 10.13039/100006754).

A =

convective Area

c =

heat capacity

C =

conductance

Cu =

copper

Ga =

gallium

H =

enthalpy of fusion

h_∞ =

convection coefficient

k =

thermal conductivity

L =

test layer thickness

PCM =

phase change material

$q˙$ =

rate of heat generation

q″ =

heat flux

T =

temperature

V =

volume

y =

spatial coordinate

Δt =

time step

ΔT =

temperature rise

Greek Symbols

ρ =

density

τ =

thermal rise constant

Φ =

liquid fraction

Subscripts and Superscripts

diff =

difference between initial and melting temperature

j =

a particular spatial element

liq =

liquid

m =

melting

n =

last element of thermal resistance network

p =

current time step

SiC =

SiC substrate

sol =

solid

steady =

during the steady-state (low power condition)

test =

test layer

trans =

during the transient (high power condition)

0 =

at time 0

1 =

first element of thermal resistance network

Nondimensional Numbers

Bi =

Biot number