... SOC Wafer level packaging The United States Government retains, and by accepting the article for publication, the publisher acknowledges that the United States Government retains, a nonexclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this work...

... and Photonic Packaging Division of ASME for publication in the J OURNAL OF E LECTRONIC P ACKAGING . Manuscript received April 13, 2017; final manuscript received July 8, 2017; published online July 27, 2017. Assoc. Editor: Yi-Shao Lai. 13 04 2017 08 07 2017 3D packaging MCM SOC...

... and silicon CMOS, so as to benefit from the afore described advantages offered by such an arrangement. Chip stacking Failure analysis Harsh environment Micro vias SOC Thermal analysis 14 06 2016 25 10 2016 Contributed by the Electronic and Photonic Packaging Division of ASME...

..., 2016; published online October 6, 2016. Assoc. Editor: Kaushik Mysore. 25 07 2016 15 09 2016 Electronic SOC Thermal analysis Due to the great development of TE materials, thermoelectric devices have provided a feasible alternative in electronic cooling. Although huge...